Online / 5 & 6 February 2022



An FPGA based open source 100G NIC

Introduction to the corundum project providing the full RTL code implementing a 100 GbE NIC based on Commercial-off-the-shelf (COTS) FPGA cards, e.g. Xilinx Alveo Cards. The project consists of all RTL parts, e.g. PCIe DMA engine, NIC datapath, MAC, PHY and integration of vendor specific IP cores, such as transceivers and PCIe hard-IP cores. In addition a driver and some debugging utility is provided.

This presentation provides an introduction into the architecture and an overview about the short to mid term goals of the project. The components used within the project are briefly introduced and the options to adapt the project to the users requirements are shown.