Online / 5 & 6 February 2022

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Enable AVX-512 instructions in Valgrind


AVX-512 is a set of vector assembly instructions available on Intel Xeon Phi processors (for example, Skylake). To allow Valgrind analyze the code compiled with these instructions, they have to be explicitly enabled in Valgrind. The presentation will briefly describe the specifics of AVX-512 instructions and describe in more detail the way it is has been prototyped in Valgrind.

Speakers

Tanya Volnina

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