These days it is easy to design your own AI hardware accelerators using cheap FPGA boards and open source tooling. It's even possible to turn these into ASICs using open source technology. But how do you get such designs to integrate into your favourite open source AI tooling? In this talk we'll take you end-to-end through the process of designing custom AI hardware and integrating it into standard AI workflows, all using open source technology. We will cover: * Designing your open AI hardware by extending the open RISC-V instruction set * Creating a software layer to interface with and program it via OneAPI and the SYCL parallel programming language * Integrating this software layer with existing open AI tooling

This talk draws on our experience with a number of projects at Southampton University and with companies developing next generation AI accelerators.